demonstrates that one should not rely essentially on the physical state of a capacitor to decide on its good working order, but also proposes a reliable method allowing to know the state of a capacitor without for that it be necessary to unsolder it.

All of the products I've built have required capacitors. We often talk about the effective inductance (ESL) of capacitors and its effects on power supply integrity. What about effective resistance (ESR)? Is there a technique for determining the appropriate level of resistance, and can you use ESR to your advantage?

Like most answers to questions regarding the field of engineering, the answer is "it depends". Indeed, you can use an ESR-controlled capacitor to take advantage of the series resistance of capacitors. Depending on the target impedance you need to achieve and the low impedance bandwidth required in your high speed PDN, you may find these components useful as decoupling capacitors. However, do not rely on these components to solve all your PDN impedance problems. Intelligent component selection and simulation will give you the best chance of producing a flat PDN impedance spectrum for your high-speed/high-frequency design.

Why use ESR controlled capacitors?

An ESR-controlled capacitor has a repeatable ESR value, as can be seen at the leads of the component. Typically, when someone refers to an "ESR controlled capacitor", they are referring to a small box capacitor with an ESR value in the range of a few hundred mOhms. Concretely, when a component manufacturer specifies that a certain capacitor has a controlled ESR, it means that this one can guarantee a minimum ESR value, and the most precise nominal or maximum ESR value that you will find in the data sheets. .

Note that very large capacitors can have high ESR values, which is typical (and useful) in power electronics, we are not referring to these large capacitance, large case components when discussing ESR capacitors control. Some multilayer ceramic capacitors (MLCCs) are marketed as ESR-controlled capacitors, but the term can technically apply to any type of capacitor.

There's a good reason why TES-controlled capacitors are often overlooked when selecting components for decoupling, especially at high frequencies. When we talk about PDN impedance, we are always looking to ensure low impedance to minimize the magnitude of any transient response in the PDN when switching events occur in digital components. Target PDN impedance values can reach levels below 10 mOhms, but an ESR-controlled capacitor can contribute impedance in the hundreds of mOhms to the PDN, which we generally don't want. However, this opens up the possibility of two possible design goals:

Use only low ESR capacitors to ensure the impedance of the PDN is as low as possible.

Use ESR-controlled capacitors to critically dampen transient response.

The second design goal is interesting, but this one is not always practical, I discuss the reasons for this in the next section.

How do ESR-controlled capacitors affect PDN impedance?

First, let's look at the typical circuit pattern of a capacitor and how multiple capacitors are connected in the PDN of a PCB. The schematic sheet below shows a circuit model for a group of 4 capacitors in parallel. For now, let's assume they all have the same ESL and ESR values, but different capacitances, as shown below:

Here we have capacitors with an ESR of 50 mOhms, which is certainly within a range used to market controlled ESR capacitors. The important point of this diagram is that the PDN can be roughly modeled as a set of RLC networks in parallel. If you remember your basic courses on AC circuits, you probably already know that the resistance of an RLC network (or the ESR of an ESR-controlled capacitor) determines the Q factor of the network: a capacitor with a higher ESR value will contribute to a higher off-resonance impedance, but it will have a flatter impedance in its passband.

Just thinking about the ESR value and realizing that you have a bunch of parallel RLC networks in a PDN, it is possible to say where you will need to add a bank of ESR controlled capacitors or low ESR capacitors to flatten the impedance of the PDN. Assuming that none of the self-resonance frequencies overlap, we will typically see multiple peaks and valleys in the PDN impedance spectrum (anti-resonances and resonances respectively), which correspond to the poles and zeros of the NDP. If you have N number of unique capacitors, then you can expect to have N poles in the PDN. A sufficiently high controlled ESR capacitor could eliminate one of these peaks.

Example with multiple ESR values

To see what happens if we have multiple capacitors with different ESR values, let's take an example. In the graph below, I show the results of simulating the PDN impedance with banks of four different capacitors, while cycling through various ESR values.

The ESR values of C2 and C3 varied from 50 mOhms to 750 mOhms. As we can see below, increasing the ESR value of these capacitors has the effect of smoothing out parts of the impedance spectrum of the PDN.

The effect is interesting because we can see that it spans an entire decade in terms of frequency. Note that the smoothing is visible from 10 MHz to 100 MHz. The graph above only captures the effects of capacitors, it does not contain any information about plane capacitance, plane resonances or plane/track/rail inductance in the board.

Why not aim for critical damping?

You could certainly take the complex impedance of the PDN as a transfer function and use it to calculate the voltage fluctuation seen across the power pins of various components in your PDN. However, since we generally have an N-pole problem, the ESR values required for stability do not necessarily obey a simple equation. So I would approach this problem as a first-order eigenvalue problem and calculate the stability criteria for each part of the PDN, which is very mathematical. While you could certainly write a MATLAB script to automate this and give you an idea of the transient response in the time domain, I would instead focus on keeping below your target PDN impedance by strategically adding more capacitors to the PDN to increase the capacity.

It should be noted that you don't need to have a flat impedance spectrum, and in all practical considerations you will never get it perfectly flat. Instead, focus on reducing peaks below your target, and be sure to test whatever design you come up with.

Verdict: It's helpful, but it's not a magic bullet

Whenever you need to damp a transient oscillation, which is caused by the L and C elements of a circuit, the typical solution is to add a resistor. Although this is not normally communicated in this way, the optimal solution is to critically damp the transient response such that the edge velocity of any transient response is optimal, while suppressing oscillation. Too much resistance, and you have a slow rise time due to excessive damping.

In the results above, we looked at the effects on the impedance, not the transient response in the time domain. The results, however, are clear: adding some resistance through the use of ESR-controlled capacitors smoothes the impedance of the PDN, which is exactly what we want in a digital PDN. If you look at the results in my previous article on capacitor optimization, you can simply add more capacitors in parallel to shift the entire PDN impedance curve to lower values.

When you need to find and import ESR-controlled capacitors into your design, turn to Altium Designer®'s comprehensive set of PCB design, layout, and simulation features. Built-in SPICE simulation tools give you everything you need to simulate your design before creating your physical layout. When you've finished your design and want to release the files to your fabricator, the Altium 365™ platform makes it easy to collaborate and share your projects.

Anything is possible with Altium Designer on Altium 365! Start your free trial of Altium Designer + Altium 365 today.

demonstrates that one should not rely essentially on the physical state of a capacitor to decide on its good working order, but also proposes a reliable method allowing to know the state of a capacitor without for that it be necessary to unsolder it.

All of the products I've built have required capacitors. We often talk about the effective inductance (ESL) of capacitors and its effects on power supply integrity. What about effective resistance (ESR)? Is there a technique for determining the appropriate level of resistance, and can you use ESR to your advantage?

Like most answers to questions regarding the field of engineering, the answer is "it depends". Indeed, you can use an ESR-controlled capacitor to take advantage of the series resistance of capacitors. Depending on the target impedance you need to achieve and the low impedance bandwidth required in your high speed PDN, you may find these components useful as decoupling capacitors. However, do not rely on these components to solve all your PDN impedance problems. Intelligent component selection and simulation will give you the best chance of producing a flat PDN impedance spectrum for your high-speed/high-frequency design.

Why use ESR controlled capacitors?

An ESR-controlled capacitor has a repeatable ESR value, as can be seen at the leads of the component. Typically, when someone refers to an "ESR controlled capacitor", they are referring to a small box capacitor with an ESR value in the range of a few hundred mOhms. Concretely, when a component manufacturer specifies that a certain capacitor has a controlled ESR, it means that this one can guarantee a minimum ESR value, and the most precise nominal or maximum ESR value that you will find in the data sheets. .

Note that very large capacitors can have high ESR values, which is typical (and useful) in power electronics, we are not referring to these large capacitance, large case components when discussing ESR capacitors control. Some multilayer ceramic capacitors (MLCCs) are marketed as ESR-controlled capacitors, but the term can technically apply to any type of capacitor.

There's a good reason why TES-controlled capacitors are often overlooked when selecting components for decoupling, especially at high frequencies. When we talk about PDN impedance, we are always looking to ensure low impedance to minimize the magnitude of any transient response in the PDN when switching events occur in digital components. Target PDN impedance values can reach levels below 10 mOhms, but an ESR-controlled capacitor can contribute impedance in the hundreds of mOhms to the PDN, which we generally don't want. However, this opens up the possibility of two possible design goals:

Use only low ESR capacitors to ensure the impedance of the PDN is as low as possible.

Use ESR-controlled capacitors to critically dampen transient response.

The second design goal is interesting, but this one is not always practical, I discuss the reasons for this in the next section.

How do ESR-controlled capacitors affect PDN impedance?

First, let's look at the typical circuit pattern of a capacitor and how multiple capacitors are connected in the PDN of a PCB. The schematic sheet below shows a circuit model for a group of 4 capacitors in parallel. For now, let's assume they all have the same ESL and ESR values, but different capacitances, as shown below:

Here we have capacitors with an ESR of 50 mOhms, which is certainly within a range used to market controlled ESR capacitors. The important point of this diagram is that the PDN can be roughly modeled as a set of RLC networks in parallel. If you remember your basic courses on AC circuits, you probably already know that the resistance of an RLC network (or the ESR of an ESR-controlled capacitor) determines the Q factor of the network: a capacitor with a higher ESR value will contribute to a higher off-resonance impedance, but it will have a flatter impedance in its passband.

Just thinking about the ESR value and realizing that you have a bunch of parallel RLC networks in a PDN, it is possible to say where you will need to add a bank of ESR controlled capacitors or low ESR capacitors to flatten the impedance of the PDN. Assuming that none of the self-resonance frequencies overlap, we will typically see multiple peaks and valleys in the PDN impedance spectrum (anti-resonances and resonances respectively), which correspond to the poles and zeros of the NDP. If you have N number of unique capacitors, then you can expect to have N poles in the PDN. A sufficiently high controlled ESR capacitor could eliminate one of these peaks.

Example with multiple ESR values

To see what happens if we have multiple capacitors with different ESR values, let's take an example. In the graph below, I show the results of simulating the PDN impedance with banks of four different capacitors, while cycling through various ESR values.

The ESR values of C2 and C3 varied from 50 mOhms to 750 mOhms. As we can see below, increasing the ESR value of these capacitors has the effect of smoothing out parts of the impedance spectrum of the PDN.

The effect is interesting because we can see that it spans an entire decade in terms of frequency. Note that the smoothing is visible from 10 MHz to 100 MHz. The graph above only captures the effects of capacitors, it does not contain any information about plane capacitance, plane resonances or plane/track/rail inductance in the board.

Why not aim for critical damping?

You could certainly take the complex impedance of the PDN as a transfer function and use it to calculate the voltage fluctuation seen across the power pins of various components in your PDN. However, since we generally have an N-pole problem, the ESR values required for stability do not necessarily obey a simple equation. So I would approach this problem as a first-order eigenvalue problem and calculate the stability criteria for each part of the PDN, which is very mathematical. While you could certainly write a MATLAB script to automate this and give you an idea of the transient response in the time domain, I would instead focus on keeping below your target PDN impedance by strategically adding more capacitors to the PDN to increase the capacity.

It should be noted that you don't need to have a flat impedance spectrum, and in all practical considerations you will never get it perfectly flat. Instead, focus on reducing peaks below your target, and be sure to test whatever design you come up with.

Verdict: It's helpful, but it's not a magic bullet

Whenever you need to damp a transient oscillation, which is caused by the L and C elements of a circuit, the typical solution is to add a resistor. Although this is not normally communicated in this way, the optimal solution is to critically damp the transient response such that the edge velocity of any transient response is optimal, while suppressing oscillation. Too much resistance, and you have a slow rise time due to excessive damping.

In the results above, we looked at the effects on the impedance, not the transient response in the time domain. The results, however, are clear: adding some resistance through the use of ESR-controlled capacitors smoothes the impedance of the PDN, which is exactly what we want in a digital PDN. If you look at the results in my previous article on capacitor optimization, you can simply add more capacitors in parallel to shift the entire PDN impedance curve to lower values.

When you need to find and import ESR-controlled capacitors into your design, turn to Altium Designer®'s comprehensive set of PCB design, layout, and simulation features. Built-in SPICE simulation tools give you everything you need to simulate your design before creating your physical layout. When you've finished your design and want to release the files to your fabricator, the Altium 365™ platform makes it easy to collaborate and share your projects.

Anything is possible with Altium Designer on Altium 365! Start your free trial of Altium Designer + Altium 365 today.

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